Imported most of dolphin/os
This commit is contained in:
dbalatoni13
parent
023cd90675
commit
970da00ce2
35 changed files with 6591 additions and 131 deletions
434
src/dolphin/os/OSInterrupt.c
Normal file
434
src/dolphin/os/OSInterrupt.c
Normal file
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@ -0,0 +1,434 @@
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#include <dolphin/hw_regs.h>
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#include <dolphin/os.h>
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#include <dolphin/os/OSPriv.h>
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static asm void ExternalInterruptHandler(register __OSException exception, register OSContext *context);
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static __OSInterruptHandler *InterruptHandlerTable;
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static OSInterruptMask InterruptPrioTable[] = {
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OS_INTERRUPTMASK_PI_ERROR,
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OS_INTERRUPTMASK_PI_DEBUG,
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OS_INTERRUPTMASK_MEM,
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OS_INTERRUPTMASK_PI_RSW,
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OS_INTERRUPTMASK_PI_VI,
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OS_INTERRUPTMASK_PI_PE,
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OS_INTERRUPTMASK_PI_HSP,
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OS_INTERRUPTMASK_DSP_ARAM | OS_INTERRUPTMASK_DSP_DSP | OS_INTERRUPTMASK_AI | OS_INTERRUPTMASK_EXI | OS_INTERRUPTMASK_PI_SI
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| OS_INTERRUPTMASK_PI_DI,
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OS_INTERRUPTMASK_DSP_AI,
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OS_INTERRUPTMASK_PI_CP,
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0xFFFFFFFF,
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};
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asm BOOL OSDisableInterrupts(void)
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{
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// clang-format off
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nofralloc
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entry __RAS_OSDisableInterrupts_begin
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mfmsr r3
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rlwinm r4, r3, 0, 17, 15
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mtmsr r4
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rlwinm r3, r3, 17, 31, 31
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entry __RAS_OSDisableInterrupts_end
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blr
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// clang-format on
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}
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asm BOOL OSEnableInterrupts(void)
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{
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// clang-format off
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nofralloc
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mfmsr r3
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ori r4, r3, 0x8000
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mtmsr r4
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rlwinm r3, r3, 17, 31, 31
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blr
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// clang-format on
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}
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asm BOOL OSRestoreInterrupts(register BOOL level) {
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// clang-format off
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nofralloc
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cmpwi level, 0
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mfmsr r4
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beq _disable
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ori r5, r4, 0x8000
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b _restore
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_disable:
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rlwinm r5, r4, 0, 17, 15
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_restore:
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mtmsr r5
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rlwinm r3, r4, 17, 31, 31
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blr
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// clang-format on
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}
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__OSInterruptHandler __OSSetInterruptHandler(__OSInterrupt interrupt, __OSInterruptHandler handler)
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{
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__OSInterruptHandler oldHandler;
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oldHandler = InterruptHandlerTable[interrupt];
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InterruptHandlerTable[interrupt] = handler;
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return oldHandler;
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}
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__OSInterruptHandler __OSGetInterruptHandler(__OSInterrupt interrupt)
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{
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return InterruptHandlerTable[interrupt];
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}
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void __OSInterruptInit(void)
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{
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InterruptHandlerTable = OSPhysicalToCached(0x3040);
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memset(InterruptHandlerTable, 0, __OS_INTERRUPT_MAX * sizeof(__OSInterruptHandler));
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*(OSInterruptMask *)OSPhysicalToCached(0x00C4) = 0;
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*(OSInterruptMask *)OSPhysicalToCached(0x00C8) = 0;
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__PIRegs[1] = 0xf0;
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__OSMaskInterrupts(OS_INTERRUPTMASK_MEM | OS_INTERRUPTMASK_DSP | OS_INTERRUPTMASK_AI | OS_INTERRUPTMASK_EXI | OS_INTERRUPTMASK_PI);
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__OSSetExceptionHandler(4, ExternalInterruptHandler);
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}
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u32 SetInterruptMask(OSInterruptMask mask, OSInterruptMask current)
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{
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u32 reg;
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switch (__cntlzw(mask)) {
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case __OS_INTERRUPT_MEM_0:
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case __OS_INTERRUPT_MEM_1:
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case __OS_INTERRUPT_MEM_2:
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case __OS_INTERRUPT_MEM_3:
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case __OS_INTERRUPT_MEM_ADDRESS:
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reg = 0;
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if (!(current & OS_INTERRUPTMASK_MEM_0))
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reg |= 0x1;
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if (!(current & OS_INTERRUPTMASK_MEM_1))
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reg |= 0x2;
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if (!(current & OS_INTERRUPTMASK_MEM_2))
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reg |= 0x4;
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if (!(current & OS_INTERRUPTMASK_MEM_3))
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reg |= 0x8;
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if (!(current & OS_INTERRUPTMASK_MEM_ADDRESS))
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reg |= 0x10;
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__MEMRegs[0x0000000e] = (u16)reg;
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mask &= ~OS_INTERRUPTMASK_MEM;
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break;
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case __OS_INTERRUPT_DSP_AI:
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case __OS_INTERRUPT_DSP_ARAM:
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case __OS_INTERRUPT_DSP_DSP:
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reg = __DSPRegs[0x00000005];
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reg &= ~0x1F8;
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if (!(current & OS_INTERRUPTMASK_DSP_AI))
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reg |= 0x10;
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if (!(current & OS_INTERRUPTMASK_DSP_ARAM))
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reg |= 0x40;
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if (!(current & OS_INTERRUPTMASK_DSP_DSP))
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reg |= 0x100;
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__DSPRegs[0x00000005] = (u16)reg;
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mask &= ~OS_INTERRUPTMASK_DSP;
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break;
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case __OS_INTERRUPT_AI_AI:
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reg = __AIRegs[0];
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reg &= ~0x2C;
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if (!(current & OS_INTERRUPTMASK_AI_AI))
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reg |= 0x4;
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__AIRegs[0] = reg;
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mask &= ~OS_INTERRUPTMASK_AI;
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break;
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case __OS_INTERRUPT_EXI_0_EXI:
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case __OS_INTERRUPT_EXI_0_TC:
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case __OS_INTERRUPT_EXI_0_EXT:
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reg = __EXIRegs[0];
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reg &= ~0x2C0F;
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if (!(current & OS_INTERRUPTMASK_EXI_0_EXI))
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reg |= 0x1;
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if (!(current & OS_INTERRUPTMASK_EXI_0_TC))
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reg |= 0x4;
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if (!(current & OS_INTERRUPTMASK_EXI_0_EXT))
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reg |= 0x400;
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__EXIRegs[0] = reg;
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mask &= ~OS_INTERRUPTMASK_EXI_0;
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break;
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case __OS_INTERRUPT_EXI_1_EXI:
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case __OS_INTERRUPT_EXI_1_TC:
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case __OS_INTERRUPT_EXI_1_EXT:
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reg = __EXIRegs[5];
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reg &= ~0xC0F;
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if (!(current & OS_INTERRUPTMASK_EXI_1_EXI))
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reg |= 0x1;
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if (!(current & OS_INTERRUPTMASK_EXI_1_TC))
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reg |= 0x4;
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if (!(current & OS_INTERRUPTMASK_EXI_1_EXT))
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reg |= 0x400;
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__EXIRegs[5] = reg;
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mask &= ~OS_INTERRUPTMASK_EXI_1;
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break;
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case __OS_INTERRUPT_EXI_2_EXI:
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case __OS_INTERRUPT_EXI_2_TC:
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reg = __EXIRegs[10];
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reg &= ~0xF;
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if (!(current & OS_INTERRUPTMASK_EXI_2_EXI))
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reg |= 0x1;
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if (!(current & OS_INTERRUPTMASK_EXI_2_TC))
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reg |= 0x4;
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__EXIRegs[10] = reg;
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mask &= ~OS_INTERRUPTMASK_EXI_2;
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break;
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case __OS_INTERRUPT_PI_CP:
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case __OS_INTERRUPT_PI_SI:
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case __OS_INTERRUPT_PI_DI:
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case __OS_INTERRUPT_PI_RSW:
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case __OS_INTERRUPT_PI_ERROR:
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case __OS_INTERRUPT_PI_VI:
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case __OS_INTERRUPT_PI_DEBUG:
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case __OS_INTERRUPT_PI_PE_TOKEN:
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case __OS_INTERRUPT_PI_PE_FINISH:
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case __OS_INTERRUPT_PI_HSP:
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reg = 0xF0;
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if (!(current & OS_INTERRUPTMASK_PI_CP)) {
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reg |= 0x800;
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}
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if (!(current & OS_INTERRUPTMASK_PI_SI)) {
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reg |= 0x8;
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}
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if (!(current & OS_INTERRUPTMASK_PI_DI)) {
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reg |= 0x4;
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}
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if (!(current & OS_INTERRUPTMASK_PI_RSW)) {
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reg |= 0x2;
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}
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if (!(current & OS_INTERRUPTMASK_PI_ERROR)) {
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reg |= 0x1;
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}
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if (!(current & OS_INTERRUPTMASK_PI_VI)) {
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reg |= 0x100;
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}
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if (!(current & OS_INTERRUPTMASK_PI_DEBUG)) {
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reg |= 0x1000;
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}
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if (!(current & OS_INTERRUPTMASK_PI_PE_TOKEN)) {
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reg |= 0x200;
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}
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if (!(current & OS_INTERRUPTMASK_PI_PE_FINISH)) {
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reg |= 0x400;
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}
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if (!(current & OS_INTERRUPTMASK_PI_HSP)) {
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reg |= 0x2000;
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}
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__PIRegs[1] = reg;
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mask &= ~OS_INTERRUPTMASK_PI;
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break;
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default:
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break;
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}
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return mask;
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}
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OSInterruptMask OSGetInterruptMask(void)
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{
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return *(OSInterruptMask *)OSPhysicalToCached(0x00C8);
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}
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OSInterruptMask OSSetInterruptMask(OSInterruptMask local)
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{
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BOOL enabled;
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OSInterruptMask global;
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OSInterruptMask prev;
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OSInterruptMask mask;
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enabled = OSDisableInterrupts();
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global = *(OSInterruptMask *)OSPhysicalToCached(0x00C4);
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prev = *(OSInterruptMask *)OSPhysicalToCached(0x00C8);
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mask = (global | prev) ^ local;
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*(OSInterruptMask *)OSPhysicalToCached(0x00C8) = local;
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while (mask) {
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mask = SetInterruptMask(mask, global | local);
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}
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OSRestoreInterrupts(enabled);
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return prev;
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}
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OSInterruptMask __OSMaskInterrupts(OSInterruptMask global)
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{
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BOOL enabled;
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OSInterruptMask prev;
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OSInterruptMask local;
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OSInterruptMask mask;
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enabled = OSDisableInterrupts();
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prev = *(OSInterruptMask *)OSPhysicalToCached(0x00C4);
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local = *(OSInterruptMask *)OSPhysicalToCached(0x00C8);
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mask = ~(prev | local) & global;
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global |= prev;
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*(OSInterruptMask *)OSPhysicalToCached(0x00C4) = global;
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while (mask) {
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mask = SetInterruptMask(mask, global | local);
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}
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OSRestoreInterrupts(enabled);
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return prev;
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}
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OSInterruptMask __OSUnmaskInterrupts(OSInterruptMask global)
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{
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BOOL enabled;
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OSInterruptMask prev;
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OSInterruptMask local;
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OSInterruptMask mask;
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enabled = OSDisableInterrupts();
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prev = *(OSInterruptMask *)OSPhysicalToCached(0x00C4);
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local = *(OSInterruptMask *)OSPhysicalToCached(0x00C8);
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mask = (prev | local) & global;
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global = prev & ~global;
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*(OSInterruptMask *)OSPhysicalToCached(0x00C4) = global;
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while (mask) {
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mask = SetInterruptMask(mask, global | local);
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}
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OSRestoreInterrupts(enabled);
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return prev;
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}
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volatile OSTime __OSLastInterruptTime;
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volatile __OSInterrupt __OSLastInterrupt;
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volatile u32 __OSLastInterruptSrr0;
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void __OSDispatchInterrupt(__OSException exception, OSContext *context)
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{
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u32 intsr;
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u32 reg;
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OSInterruptMask cause;
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OSInterruptMask unmasked;
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OSInterruptMask *prio;
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__OSInterrupt interrupt;
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__OSInterruptHandler handler;
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intsr = __PIRegs[0];
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intsr &= ~0x00010000;
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if (intsr == 0 || (intsr & __PIRegs[1]) == 0) {
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OSLoadContext(context);
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}
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cause = 0;
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if (intsr & 0x00000080) {
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reg = __MEMRegs[15];
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if (reg & 0x1)
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cause |= OS_INTERRUPTMASK_MEM_0;
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if (reg & 0x2)
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cause |= OS_INTERRUPTMASK_MEM_1;
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if (reg & 0x4)
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cause |= OS_INTERRUPTMASK_MEM_2;
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if (reg & 0x8)
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cause |= OS_INTERRUPTMASK_MEM_3;
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if (reg & 0x10)
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cause |= OS_INTERRUPTMASK_MEM_ADDRESS;
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}
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if (intsr & 0x00000040) {
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reg = __DSPRegs[5];
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if (reg & 0x8)
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cause |= OS_INTERRUPTMASK_DSP_AI;
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if (reg & 0x20)
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cause |= OS_INTERRUPTMASK_DSP_ARAM;
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if (reg & 0x80)
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cause |= OS_INTERRUPTMASK_DSP_DSP;
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}
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if (intsr & 0x00000020) {
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reg = __AIRegs[0];
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if (reg & 0x8)
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cause |= OS_INTERRUPTMASK_AI_AI;
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}
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if (intsr & 0x00000010) {
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reg = __EXIRegs[0];
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if (reg & 0x2)
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cause |= OS_INTERRUPTMASK_EXI_0_EXI;
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if (reg & 0x8)
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cause |= OS_INTERRUPTMASK_EXI_0_TC;
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if (reg & 0x800)
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cause |= OS_INTERRUPTMASK_EXI_0_EXT;
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reg = __EXIRegs[5];
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if (reg & 0x2)
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cause |= OS_INTERRUPTMASK_EXI_1_EXI;
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if (reg & 0x8)
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cause |= OS_INTERRUPTMASK_EXI_1_TC;
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if (reg & 0x800)
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cause |= OS_INTERRUPTMASK_EXI_1_EXT;
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reg = __EXIRegs[10];
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if (reg & 0x2)
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cause |= OS_INTERRUPTMASK_EXI_2_EXI;
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if (reg & 0x8)
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cause |= OS_INTERRUPTMASK_EXI_2_TC;
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}
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if (intsr & 0x00002000)
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cause |= OS_INTERRUPTMASK_PI_HSP;
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if (intsr & 0x00001000)
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cause |= OS_INTERRUPTMASK_PI_DEBUG;
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if (intsr & 0x00000400)
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cause |= OS_INTERRUPTMASK_PI_PE_FINISH;
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if (intsr & 0x00000200)
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cause |= OS_INTERRUPTMASK_PI_PE_TOKEN;
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if (intsr & 0x00000100)
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cause |= OS_INTERRUPTMASK_PI_VI;
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if (intsr & 0x00000008)
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cause |= OS_INTERRUPTMASK_PI_SI;
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if (intsr & 0x00000004)
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cause |= OS_INTERRUPTMASK_PI_DI;
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if (intsr & 0x00000002)
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cause |= OS_INTERRUPTMASK_PI_RSW;
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if (intsr & 0x00000800)
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cause |= OS_INTERRUPTMASK_PI_CP;
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if (intsr & 0x00000001)
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cause |= OS_INTERRUPTMASK_PI_ERROR;
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unmasked = cause & ~(*(OSInterruptMask *)OSPhysicalToCached(0x00C4) | *(OSInterruptMask *)OSPhysicalToCached(0x00C8));
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if (unmasked) {
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for (prio = InterruptPrioTable;; ++prio) {
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if (unmasked & *prio) {
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interrupt = (__OSInterrupt)__cntlzw(unmasked & *prio);
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break;
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}
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}
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handler = __OSGetInterruptHandler(interrupt);
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if (handler) {
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if (__OS_INTERRUPT_MEM_ADDRESS < interrupt) {
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__OSLastInterrupt = interrupt;
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__OSLastInterruptTime = OSGetTime();
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__OSLastInterruptSrr0 = context->srr0;
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}
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OSDisableScheduler();
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handler(interrupt, context);
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OSEnableScheduler();
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__OSReschedule();
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OSLoadContext(context);
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}
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}
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OSLoadContext(context);
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}
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static asm void ExternalInterruptHandler(register __OSException exception, register OSContext *context)
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{
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#pragma unused(exception)
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// clang-format off
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nofralloc
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OS_EXCEPTION_SAVE_GPRS(context)
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stwu r1, -8(r1)
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b __OSDispatchInterrupt
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// clang-format on
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}
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