cdb1d1fc37
* Match mtx and Padclamp.c * Match the rest of GX * Import TRK 2.6 * Import MSL headers and files * Merge some MSL headers into ours
381 lines
9.1 KiB
C
381 lines
9.1 KiB
C
#ifndef __METROTRK_TRK_H__
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#define __METROTRK_TRK_H__
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#include "dolphin/types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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//////////// TRK ENUMS /////////////
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// Hardware types.
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typedef enum {
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HARDWARE_AMC_DDH = 0,
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HARDWARE_GDEV = 1,
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HARDWARE_BBA = 2,
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} HardwareType;
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// DS Error returns.
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enum {
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DS_NoError = 0x0,
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DS_StepError = 0x1,
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DS_ParameterError = 0x2,
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DS_EventQueueFull = 0x100,
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DS_NoMessageBufferAvailable = 0x300,
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DS_MessageBufferOverflow = 0x301,
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DS_MessageBufferReadError = 0x302,
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DS_DispatchError = 0x500,
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DS_InvalidMemory = 0x700,
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DS_InvalidRegister = 0x701,
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DS_CWDSException = 0x702,
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DS_UnsupportedError = 0x703,
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DS_InvalidProcessID = 0x704,
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DS_InvalidThreadID = 0x705,
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DS_OSError = 0x706,
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DS_Error800 = 0x800,
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};
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typedef int DSError;
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// Where to read/write.
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typedef enum {
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DS_Stdin = 0,
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DS_Stdout = 1,
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DS_Stderr = 2,
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} DSFileHandle;
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// IO returns.
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typedef enum {
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DS_IONoError = 0,
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DS_IOError = 1,
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DS_IOEOF = 2,
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} DSIOResult;
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// Message command IDs
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typedef enum {
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DSMSG_Ping = 0x0,
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DSMSG_Connect = 0x1,
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DSMSG_Disconnect = 0x2,
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DSMSG_Reset = 0x3,
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DSMSG_Versions = 0x4,
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DSMSG_SupportMask = 0x5,
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DSMSG_Override = 0x7,
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DSMSG_ReadMemory = 0x10,
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DSMSG_WriteMemory = 0x11,
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DSMSG_ReadRegisters = 0x12,
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DSMSG_WriteRegisters = 0x13,
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DSMSG_SetOption = 0x17,
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DSMSG_Continue = 0x18,
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DSMSG_Step = 0x19,
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DSMSG_Stop = 0x1A,
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DSMSG_ReplyACK = 0x80,
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DSMSG_NotifyStopped = 0x90,
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DSMSG_NotifyException = 0x91,
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DSMSG_WriteFile = 0xD0,
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DSMSG_ReadFile = 0xD1,
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DSMSG_OpenFile = 0xD2,
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DSMSG_CloseFile = 0xD3,
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DSMSG_PositionFile = 0xD4,
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DSMSG_ReplyNAK = 0xFF,
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} MessageCommandID;
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// Register commands.
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typedef enum {
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DSREG_Default = 0,
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DSREG_FP = 1,
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DSREG_Extended1 = 2,
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DSREG_Extended2 = 3,
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} DSMessageRegisterOptions;
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// Step commands.
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typedef enum {
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DSSTEP_IntoCount = 0x0,
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DSSTEP_IntoRange = 0x1,
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DSSTEP_OverCount = 0x10,
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DSSTEP_OverRange = 0x11,
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} DSMessageStepOptions;
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typedef enum {
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DSREPLY_NoError = 0x0,
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DSREPLY_Error = 0x1,
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DSREPLY_PacketSizeError = 0x2,
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DSREPLY_CWDSError = 0x3,
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DSREPLY_EscapeError = 0x4,
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DSREPLY_BadFCS = 0x5,
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DSREPLY_Overflow = 0x6,
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DSREPLY_SequenceMissing = 0x7,
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DSREPLY_UnsupportedCommandError = 0x10,
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DSREPLY_ParameterError = 0x11,
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DSREPLY_UnsupportedOptionError = 0x12,
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DSREPLY_InvalidMemoryRange = 0x13,
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DSREPLY_InvalidRegisterRange = 0x14,
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DSREPLY_CWDSException = 0x15,
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DSREPLY_NotStopped = 0x16,
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DSREPLY_BreakpointsFull = 0x17,
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DSREPLY_BreakpointConflict = 0x18,
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DSREPLY_OSError = 0x20,
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DSREPLY_InvalidProcessID = 0x21,
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DSREPLY_InvalidThreadID = 0x22,
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DSREPLY_DebugSecurityError = 0x23,
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} DSReplyError;
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typedef enum {
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DSRECV_Wait = 0,
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DSRECV_Found = 1,
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DSRECV_InFrame = 2,
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DSRECV_FrameOverflow = 3,
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} ReceiverState;
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typedef enum {
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DSMSGMEMORY_Segmented = 0x01, /* non-flat addr space */
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DSMSGMEMORY_Extended = 0x02, /* > 32-bit data addr */
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DSMSGMEMORY_Protected = 0x04, /* non-user memory */
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DSMSGMEMORY_Userview = 0x08, /* breakpoints are invisible */
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DSMSGMEMORY_Space_program = 0x00,
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DSMSGMEMORY_Space_data = 0x40,
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DSMSGMEMORY_Space_io = 0x80
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};
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typedef enum {
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NUBEVENT_Null = 0,
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NUBEVENT_Shutdown = 1,
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NUBEVENT_Request = 2,
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NUBEVENT_Breakpoint = 3,
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NUBEVENT_Exception = 4,
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NUBEVENT_Support = 5,
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} NubEventType;
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typedef enum {
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VALIDMEM_Readable = 0,
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VALIDMEM_Writeable = 1,
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} ValidMemoryOptions;
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typedef enum {
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MEMACCESS_UserMemory = 0,
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MEMACCESS_DebuggerMemory = 1,
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} MemoryAccessOptions;
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typedef int UARTError;
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typedef enum {
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UART_NoError = 0,
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UART_UnknownBaudRate = 1,
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UART_ConfigurationError = 2,
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UART_BufferOverflow = 3, // specified buffer was too small
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UART_NoData = 4, // no data available from polling
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} UARTErrorOptions;
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typedef enum {
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kBaudHWSet = -1, // use HW settings such as DIP switches
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kBaud300 = 300, // valid baud rates
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kBaud600 = 600,
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kBaud1200 = 1200,
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kBaud1800 = 1800,
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kBaud2000 = 2000,
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kBaud2400 = 2400,
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kBaud3600 = 3600,
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kBaud4800 = 4800,
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kBaud7200 = 7200,
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kBaud9600 = 9600,
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kBaud19200 = 19200,
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kBaud38400 = 38400,
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kBaud57600 = 57600,
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kBaud115200 = 115200,
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kBaud230400 = 230400
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} UARTBaudRate;
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////////////////////////////////////
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typedef int MessageBufferID;
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#define TRKMSGBUF_SIZE (0x800 + 0x80)
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typedef struct TRKBuffer {
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/* 0x00 */ u32 mutex;
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/* 0x04 */ BOOL isInUse;
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/* 0x08 */ u32 length;
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/* 0x0C */ u32 position;
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/* 0x10 */ u8 data[TRKMSGBUF_SIZE];
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} TRKBuffer;
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typedef struct TRKFramingState {
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MessageBufferID msgBufID; // _00
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TRKBuffer* buffer; // _04
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ReceiverState receiveState; // _08
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BOOL isEscape; // _0C
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u8 fcsType; // _10
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} TRKFramingState;
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typedef struct TRKState_PPC {
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u32 GPR[32]; // 0x0
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u32 LR; // 0x80
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u32 CTR; // 0x84
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u32 XER; // 0x88
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u32 MSR; // 0x8c
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u32 DAR; // 0x90
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u32 DSISR; // 0x94
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BOOL stopped; // 0x98
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BOOL inputActivated; // 0x9c
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u8* inputPendingPtr; // 0xA0
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} TRKState_PPC;
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typedef struct CommandReply {
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u32 _00; // _00
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union {
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u8 b;
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MessageCommandID m;
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} commandID; // _04, use MessageCommandID enum
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union {
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u8 b;
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DSReplyError r;
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} replyError; // _08, use DSReplyError enum - should be enum type? check
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// size.
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u32 _0C; // _0C
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u8 _10[0x30]; // _10, unknown
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} CommandReply;
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typedef struct ProcessorRestoreFlags_PPC {
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u8 TBR;
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u8 DEC;
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u8 linker_padding[0x9 - 0x2];
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} ProcessorRestoreFlags_PPC;
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void TRKSaveExtended1Block();
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#define SPR_XER 1
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#define SPR_LR 8
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#define SPR_CTR 9
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#define SPR_DSISR 18
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#define SPR_DAR 19
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#define SPR_DEC 22
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#define SPR_SDR1 25
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#define SPR_SRR0 26
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#define SPR_SRR1 27
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#define SPR_SPRG0 272
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#define SPR_SPRG1 273
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#define SPR_SPRG2 274
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#define SPR_SPRG3 275
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#define SPR_EAR 282
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#define SPR_TBL 284
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#define SPR_TBU 285
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#define SPR_PVR 287
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#define SPR_IBAT0U 528
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#define SPR_IBAT0L 529
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#define SPR_IBAT1U 530
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#define SPR_IBAT1L 531
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#define SPR_IBAT2U 532
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#define SPR_IBAT2L 533
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#define SPR_IBAT3U 534
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#define SPR_IBAT3L 535
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#define SPR_IBAT4U 560
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#define SPR_IBAT4L 561
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#define SPR_IBAT5U 562
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#define SPR_IBAT5L 563
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#define SPR_IBAT6U 564
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#define SPR_IBAT6L 565
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#define SPR_IBAT7U 566
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#define SPR_IBAT7L 567
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#define SPR_DBAT0U 536
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#define SPR_DBAT0L 537
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#define SPR_DBAT1U 538
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#define SPR_DBAT1L 539
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#define SPR_DBAT2U 540
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#define SPR_DBAT2L 541
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#define SPR_DBAT3U 542
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#define SPR_DBAT3L 543
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#define SPR_DBAT4U 568
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#define SPR_DBAT4L 569
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#define SPR_DBAT5U 570
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#define SPR_DBAT5L 571
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#define SPR_DBAT6U 572
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#define SPR_DBAT6L 573
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#define SPR_DBAT7U 574
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#define SPR_DBAT7L 575
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#define SPR_GQR0 912
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#define SPR_GQR1 913
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#define SPR_GQR2 914
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#define SPR_GQR3 915
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#define SPR_GQR4 916
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#define SPR_GQR5 917
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#define SPR_GQR6 918
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#define SPR_GQR7 919
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#define SPR_HID2 920
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#define SPR_WPAR 921
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#define SPR_DMA_U 922
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#define SPR_DMA_L 923
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#define SPR_UMMCR0 936
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#define SPR_UPMC1 937
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#define SPR_UPMC2 938
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#define SPR_USIA 939
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#define SPR_UMMCR1 940
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#define SPR_UPMC3 941
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#define SPR_UPMC4 942
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#define SPR_USDA 943
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#define SPR_MMCR0 952
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#define SPR_PMC1 953
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#define SPR_PMC2 954
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#define SPR_SIA 955
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#define SPR_MMCR1 956
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#define SPR_PMC3 957
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#define SPR_PMC4 958
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#define SPR_SDA 959
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#define SPR_HID0 1008
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#define SPR_HID1 1009
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#define SPR_IABR 1010
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#define SPR_HID4 1011
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#define SPR_DABR 1013
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#define SPR_L2CR 1017
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#define SPR_ICTC 1019
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#define SPR_THRM1 1020
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#define SPR_THRM2 1021
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#define SPR_FPECR 1022
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// PPC exceptions
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// 0x000 is reserved
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#define PPC_SystemReset 0x100
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#define PPC_MachineCheck 0x200
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#define PPC_DataStorage 0x300
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#define PPC_InstructionStorage 0x400
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#define PPC_ExternalInterrupt 0x500
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#define PPC_Alignment 0x600
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#define PPC_Program 0x700
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#define PPC_FloatingPointUnavaiable 0x800
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#define PPC_Decrementer 0x900
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// 0xA00-0xB00 are reserved
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#define PPC_SystemCall 0xC00
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#define PPC_Trace 0xD00
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#define PPC_FloatingPointAssist 0xE00 // unimplemented in 750CL
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#define PPC_PerformanceMonitor 0xF00 // Dolphin/Broadway specific
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// 0x1000-0x1200 are unimplemented in 750CL
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#define PPC_InstructionAddressBreakpoint 0x1300 // Dolphin/Broadway specific
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// 0x1400-0x2F00 are reserved, but TRK uses some
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#define PPC_SystemManagementInterrupt 0x1400
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// 0x1500-0x1600 are unimplemented in 750CL
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#define PPC_ThermalManagementInterrupt 0x1700
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#define PPC_1800Exception 0x1800
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#define PPC_1900Exception 0x1900
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#define PPC_1A00Exception 0x1A00
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#define PPC_1B00Exception 0x1B00
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#define PPC_1C00Exception 0x1C00 // Data breakpoint?
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#define PPC_1D00Exception 0x1D00 // Instruction breakpoint?
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#define PPC_1E00Exception 0x1E00 // Peripheral breakpoint?
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#define PPC_1F00Exception 0x1F00 // Non maskable development port?
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#define PPC_2000Exception 0x2000
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#ifdef __cplusplus
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}
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#endif
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#endif /* __METROTRK_TRK_H__ */
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